Benefits: |
World-Class benefits package |
Job Description:
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Title: Design Verification Engineer – Best to work for in TX
Location: Austin, TX
Job Type: Full Time
Salary: Open and flexible DOE
Bonus Eligible: Yes
Benefits: World-Class benefits package
Relocation Assistance: Yes
Interview Travel Reimbursed: Yes
Come join one of the fastest growing companies in Austin in this exciting newly created position due to growth. This company is a regular on the Best Places to Work in Texas and have experienced dramatic revenue increases even in this down economy. This experienced management team always builds a tremendous corporate culture and the company experiences almost 0% turnover.
You will work closely with digital/analog designers, applications engineers and manufacturing test to support both pre-silicon verification and post silicon validation efforts.
Skills/Experience:
- Requires a BSEE or BSCS, MSEE/MSCS preferred, and 5 years of verification experience preferably in mixed signal products.
- Strong background with HDLs (e.g. Verilog, VHDL) and HVLs (e.g. SystemVerilog/OVM, Vera, e) required.
- You must have solid scripting skills with Matlab, Perl, Unix/Linux shell, TCL, and must be able to write and debug analog behavioral models in Verilog, Verilog-A, and/or Verilog-AMS.
- Knowledge of signal processing and Verilog Assertions are also a plus.
- The proven ability to create, evaluate, debug, and improve a verification process is essential for this position.
Please forward resumes and I will call qualified candidates immediately to tell them more about this opportunity.
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