Job Description:
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AGENCY SEARCH ASSIGNMENT: T. Kopec and Associates
HOME Office: 800-441-0966 Pacific (access code “00”) or 541-588-6255
The Position
Senior Wafer Foundry Engineer
Semiconductors
Engineering
Full-time
United States - Texas - Austin <>
The Compensation
Base Salary: $80,000 - $115,000
Benefits - Full
Commission Compensation - No
Bonus Eligible - Yes
Overtime Eligible - No
Relocation Assistance Available - Yes
Interview Travel Reimbursed - Yes <>
The Ideal Candidate
5 to 7 years of experience
Management Experience Required - No
Minimum Education - Bachelor's Degree
Willingness to Travel - Occasionally <>
Detailed Description
We are seeking an engineer with strong CMOS manufacturing experience, reporting into Director of Foundry Engineering in Austin, TX. The engineer will be responsible for a wide range of foundry sustaining activities, including:
- Work with internal product/test, operations and design groups, as well as foundry suppliers to meet and exceed yield, quality and reliability requirements of Company products from prototypes to volume production.
- Closely monitor and improve Fab quality and production metrics including in-line Cpks, PCM trends, Do, yield trends and reliability monitors.
- Perform PCM to yield correlation, as well as wafer level reliability data analysis.
- Drive problem investigations with the foundry vendors and validate corrective/preventive actions to minimize RMA, scrap or non-compliance incidents.
- Support foundry audits and be able to travel overseas upon short notice.
- Support Foundry Technology and IC Design groups on front-end engineering activities.
Required Qualifications and Experience:
- Bachelor's, Electrical Engineering is required; Master's, Electrical Engineering is preferred.
- Sound knowledge of CMOS fabrication processes.
- 5+ years industry experience, including 3+ years working in/with a CMOS fab in an engineering capacity.
- Strong knowledge and experience in Fab SPC practice (inline and PCM). Good understandings of quality procedures.
- Authorization to work in the US. May need up to 10% travel overseas.
Required Personal Attributes:
- High ethical standards.
- Fairness and consistency in supplier management.
- Understanding of Asian cultures.
- Excellent written and oral communications skills.
- Ability to manage multiple projects and deadlines.
Preferred Qualifications:
- Thorough understanding of CMOS device physics and reliability concepts.
- Knowledge of FA techniques
- JEDEC Procedures for IC Qualification
- SPC and Design of Experiments; Corner/Split Lot methodology
- Knowledge of Bipolar, High-Voltage and Mixed-Mode CMOS processes
- Korean or Chinese language ability
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